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619114nk/42413nk 20121220-s00010 no.a1702-1/21 semiconductor components industries, llc, 2014 june, 2014 http://onsemi.com LV8729V overview the LV8729V is a pwm curren t-controlled microstep bipolar stepper motor driver. this driver can perform eight times of excitation of the second phase to 32w1-second phase and can drive simply by the clk input. function ? single-channel pwm current control stepper motor driver. ? bicdmos process ic. ? output on-resistance (upper side : 0.35 ; lower side : 0.3 ; total of upper and lower : 0.65 ; ta = 25 c, i o = 1.8a) ? 2-phase, 1-2 phase, w1-2 phase, 2w1-2 phase, 4w1-2 ph ase,8w1-2 phase, 16w1-2 phase, 32w1-2 phase excitation are selectable. ? advance the excitation step with the only step signal input. ? available forward reverse control. ? over current protection circuit. ? thermal shutdown circuit. ? input pull down resistance ? with reset pin and enable pin. specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage vm max vm , vm1 , vm2 36 v maximum output current i o max per 1ch 1.8 a maximum logic input voltage v in max st , md1 , md2 , md3 , oe , rst , fr , 6 v maximum vref input voltage vref max 6 v maximum mo input voltage v mo max 6 v maximum down input voltage v down max 6 v allowable power dissipation pd max * 3.85 w operating temperature topr -30 to +85 c storage temperature tstg -55 to +150 c * specified circuit board : 90.0mm 90.0mm 1.6mm, glass epoxy 2-layer boar d, with backside mounting. caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of abso lute maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of th e ic may be degraded. please contact us for the further detai ls. orderin g numbe r : ena1702d bi-cmos ic pwm constant-current control stepper motor driver ordering information see detailed ordering and shipping informa tion on page 21 of this data sheet. stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should n ot be assumed, damage may occur and reliability may be affected. ssop44k (275mil)
LV8729V no.a1702d-2/21 allowable operating ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage range vm vm , vm1 , vm2 9 to 32 v logic input voltage v in st , md1 , md2 , md3 , oe , rst , fr , step 0 to 5 v vref input voltage range vref 0 to 3 v electrical characteristics at ta = 25c, vm = 24v, vref = 1.5v parameter symbol conditions ratings unit min typ max standby mode current drain i m st st = ?l? , vm+vm1+vm2 70 100 a current drain im st = ?h ?, oe = ?h?, no load vm+vm1+vm2 3.3 4.6 ma thermal shutdown temperature tsd design guarantee 150 180 200 c thermal hysteresis width tsd design guarantee 40 c logic pin input current i in l st , md1 , md2 , md3 , oe , rst , fr , step , v in = 0.8v 38 15 a i in h st , md1 , md2 , md3 , oe , rst , fr , step , v in = 5v 30 50 70 a logic input voltage high v in h st , md1 , md2 , md3 , oe , rst , fr , step 2.0 5.0 v low v in l 0 0.8 v chopping frequency fch cosc1 = 100pf 70 100 130 khz osc1 pin charge/discharge current iosc1 7 10 13 a chopping oscillation circuit threshold voltage vtup1 0.8 1 1.2 v vtdown1 0.3 0.5 0.7 v vref pin input voltage ir ef vref = 1.5v -0.5 a down output residual voltagr v o 1down idown = 1ma 40 100 mv mo pin residual voltage v o 1mo imo = 1ma 40 100 mv hold current switching frequency fdown cosc2 = 1500pf 1.12 1.6 2.08 hz hold current switching frequency threshold voltage vtup2 0.8 1 1.2 v vtdown2 0.3 0.5 0.7 v vreg1 output voltage vreg1 4.7 5 5.3 v vreg2 output voltage vreg2 v m 18 19 20 v output on-resistance ronu i o = 1.8a, high-side on resistance 0.35 0.455 ? rond i o = 1.8a, low-side on resistance 0.3 0.39 ? output leakage current i o leak v m = 36v 50 a diode forward voltage vd i d = -1.8a 1 1.4 v current setting reference voltage vrf vref = 1.5v, current ratio 100% 0.285 0.3 0.315 v functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresses beyond the recomme nded operating ranges limits may affect device r eliab ility. product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product per formance may not be indicated by the electrical characteristics if operated under different conditions.
LV8729V no.a1702d-3/21 package dimensions unit : mm (typ) ssop44k (275mil) exposed pad case 940af issue a
LV8729V no.a1702d-4/21 soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. (unit: mm) 7.00 0.32 1.00 0.65 (4.7) (3.5) xxxxx = specific device code y = year m = month ddd = additional traceability data generic marking diagram* xxxxxxxxxx ymddd
LV8729V no.a1702d-5/21 pin assignment 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 out1a vm out1a nc pgnd1 vreg2 nc nc nc vreg1 vm1 st vm1 md1 rf1 md2 rf1 md3 out1b oe out1b rst out2a nc out2a fr rf2 stp rf2 osc1 vm2 osc2 vm2 nc nc emo nc down pgnd2 mo out2b vref out2b sgnd top view LV8729V
LV8729V no.a1702d-6/21 substrate specifications (substrate recommended for operation of LV8729V) size : 90mm 90mm 1.6mm (two-layer substrate [2s0p]) material : glass epoxy copper wiring density : l1 = 85% / l2 = 90% l1 : copper wiring pattern diagram l2 : copper wiring pattern diagram cautions 1) the data for the case with the exposed die-pad substrate mounted shows the values when 90% or more of the exposed die-pad is wet. 2) for the set design, employ the derating design with sufficient margin. stresses to be derated include the voltage, current, junctio n temperature, power loss, and mechanical stresses such as vibration, impact, and tension. accordingly, the design must ensure these stresses to be as low or small as possible. the guideline for ordinary derating is shown below : (1)maximum value 80% or less for the voltage rating (2)maximum value 80% or less for the current rating (3)maximum value 80% or less for the temperature rating 3) after the set design, be sure to verify the design with the actual product. confirm the solder joint state and verify also the re liability of solder joint for the exposed die-pad, etc. any void or deterioration, if observed in the solder jo int of these parts, causes deteriorated thermal conduction, possibly resulting in thermal destruction of ic. pd max - ta 0 1.0 2.0 2.70 5.0 3.0 3.85 ? 30 60 90 30 0 120 4.0 2.00 1.40 allowable power dissipation, pd max - w ambient temperature, ta - c (1):exposed die-padsubstrate (2):without exposed die-pad (1) (2)
LV8729V no.a1702d-7/21 block diagram osc1 oe mo rst stp fr md3 md2 md1 osc2 st tsd isd vref sgnd vreg1 vm pgnd1 vreg2 rf1 out1a out1b out2a out2b rf2 vm2 vm1 + - + - + - + - down emo pgnd2 decay mode setting circuit current select circuit output pre stage output pre stage output pre stage output pre stage output control logic current select circuit oscllator regulator 1 regulator 2
LV8729V no.a1702d-8/21 pin functions pin no. pin name pin func ttion equivalent circuit 7 8 9 10 11 13 14 md1 md2 md3 oe rst fr stp excitation mode switching pin excitation mode switching pin excitation mode switching pin output enable signal input pin reset signal input pin forward / reverse signal input pin step clock pulse signal input pin vreg1 gnd 6 st chip enable pin. vreg1 gnd 23, 24 25 28, 29 30, 31 32, 33 34, 35 36, 37 38, 39 42 43, 44 out2b pgnd2 v m 2 rf2 out2a out1b rf1 v m 1 pgnd1 out1a channel 2 outb output pin. channel 2 power system ground channel 2 motor power supply connection pin. channel 2 current-sense resistor connection pin. channel 2 outa output pin. channel 1 outb output pin. channel 1 current-sense resistor connection pin. channel 1 motor power supply pin. channel 1 power system ground channel 1 outa output pin. gnd 23 34 24 35 28 29 38 39 33 44 32 43 36 37 30 31 42 25 21 vref constant-curre nt control reference voltage input pin. gnd vreg1 continued on next page.
LV8729V no.a1702d-9/21 continued from preceding page. pin no. pin name pin func ttion equivalent circuit 3 vreg2 internal regulator capacitor connection pin. gnd vm 5 vreg1 internal regulator capacitor connection pin. gnd vm 18 19 20 emo down mo over-current detection alarm output pin. holding current output pin. position detecting monitor pin. vreg1 gnd 15 16 osc1 osc2 copping frequency setting capacitor connection pin. holding current detection time setting capacitor connection pin. gnd vreg5
LV8729V no.a1702d-10/21 reference describing operation (1) stand-by function when st pin is at low levels, the ic enters stand-by mode, all logic is reset and output is turned off. when st pin is at high levels, the stand-by mode is released. (2) step pin function input operating mode st stp low * standby mode high excitation step proceeds high excitation step is kept (3) input timing tsteph/tstepl : clock h/l pulse width (min 500ns) tds : data set-up time (min 500ns) tdh : data hold time (min 500ns) (4) excitation setting method set the excitation setting as shown in the following table by setting md1 pin, md2 pin and md3 pin. input mode (excitation) initial position md3 md2 md1 1ch current 2ch current low low low 2 phase 100% -100% low low high 1-2 phase 100% 0% low high low w1-2 phase 100% 0% low high high 2w1-2 phase 100% 0% high low low 4w1-2 phase 100% 0% high low high 8w1-2 phase 100% 0% high high low 16w1-2 phase 100% 0% high high high 32w1-2 phase 100% 0% the initial position is also the default state at start-up an d excitation position at counter-reset in each excitation mode. (5) output current setting output current is set shown below by the vref pin (applied voltage) and a resistance value between rf1(2) pin and gnd. i out = ( vref / 5 ) / rf1 (2) resistance * the setting value above is a 100% output current in each excitation mode. (example) when vref = 1.1v and rf1 (2) resistance is 0.22 ? , the setting is shown below. i out = ( 1.1v / 5 ) / 0.22 ? = 1.0a step md1 md2 fr tsteph tstepl tds (md1 step) tdh (step md1) tds (md2 step) tdh (step md2) tds (fr step) tdh (step fr)
LV8729V no.a1702d-11/21 (6) output enable function when the oe pin is set low, the output is forced off and go es to high impedance. however, the internal logic circuits are operating, so the excitation position proceeds when the stp is input. therefore, when oe pin is returned to high, the output level conforms to the excitation position proceeded by the stp input. (7) reset function when the rst pin is set low, the output goes to initial mode and excitation position is fixed in the initial position for stp pin and fr pin input. mo pin outputs at low levels at the initial position. (open drain connection) oe power save mode 0% step moni 1ch output 2ch output output is high-impedance rst reset 0% step moni 1ch output 2ch output initial state
LV8729V no.a1702d-12/21 (8) forward / reverse switching function fr operating mode low clockwise (cw) high counter-clockwise (ccw) the internal d/a converter proceeds by a b it on the rising edge of the step signa l input to the stp pin. in addition, cw and ccw mode are switched by fr pin setting. in cw mode, the channel 2 current phase is delayed by 90 relative to the channel 1 current. in ccw mode, the channel 2 current phase is adva nced by 90 relative to the channel 1 current. (9) emo, down, mo output pin the output pin is open -drain connection. when it becomes prescribed, it turns on, and each pin outputs the low level. pin state emo down mo low at detection of over-current holding current state initial position off normal state normal state non initial position (10) chopping frequency setting function chopping frequency is set as shown below by a capacitor between osc1 pin and gnd. fcp = 1 / ( cosc1 / 10 10 -6 ) (hz) (example) when cosc1 = 200pf, the chopping frequency is shown below. fcp = 1 / ( 200 10 -12 / 10 10 -6 ) = 50(khz) fr cw mode cw mode ccw mode step excitation position 1ch output 2ch output (1) (2) (3) (4) (5) (6) (5) (4) (3) (4) (5)
LV8729V no.a1702d-13/21 (11) output current vector locus (o ne step is normalized to 90 degrees) current setting ratio in each excitation mode step 32w1-2 p hase ( % ) 16w1-2 p hase ( % ) 8w1-2 p hase ( % ) 4w1-2 p hase ( % ) 2w1-2 p hase ( % ) w1-2 p hase ( % ) 1-2 p hase ( % ) 2 p hase ( % ) 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 0 100 0 100 0 100 0 100 0 100 0 100 0 100 0 1 100 1 2 100 2 100 2 3 100 4 4 100 5 100 5 100 5 5 100 6 6 100 7 100 7 7 100 9 8 100 10 100 10 100 10 100 10 9 99 11 10 99 12 99 12 11 99 13 12 99 15 99 15 99 15 13 99 16 14 99 17 99 17 15 98 18 16 98 20 98 20 98 20 98 20 98 20 17 98 21 18 98 22 98 22 19 97 23 20 97 24 97 24 97 24 21 97 25 22 96 27 96 27 23 96 28 24 96 29 96 29 96 29 96 29 25 95 30 continued on next page. 0.0 33.3 66.7 100.0 0.0 33.3 66.7 100.0 channel 1 current ratio (%) channel 2 current ratio (%)
LV8729V no.a1702d-14/21 continued from preceding page. step 32w1-2 p hase 16w1-2 p hase 8w1-2 p hase 4w1-2 p hase 2w1-2 p hase w1-2 p hase ( % ) 1-2 p hase ( % ) 2 p hase ( % ) 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 26 95 31 95 31 27 95 33 28 94 34 94 34 94 34 29 94 35 30 93 36 93 36 31 93 37 32 92 38 92 38 92 38 92 38 92 38 92 38 33 92 39 34 91 41 91 41 35 91 42 36 90 43 90 43 90 43 37 90 44 38 89 45 89 45 39 89 46 40 88 47 88 47 88 47 88 47 41 88 48 42 87 49 87 49 43 86 50 44 86 51 86 51 86 51 45 85 52 46 84 53 84 53 47 84 55 48 83 56 83 56 83 56 83 56 83 56 49 82 57 50 82 58 82 58 51 81 59 52 80 60 80 60 80 60 53 80 61 54 79 62 79 62 55 78 62 56 77 63 77 63 77 63 77 63 57 77 64 58 76 65 76 65 59 75 66 60 74 67 74 67 74 67 61 73 68 62 72 69 72 69 63 72 70 64 71 71 71 71 71 71 71 71 71 71 71 71 71 71 100 100 65 70 72 66 69 72 69 72 67 68 73 68 67 74 67 74 67 74 69 66 75 70 65 76 65 76 71 64 77 72 63 77 63 77 63 77 63 77 73 62 78 74 62 79 62 79 75 61 80 76 60 80 60 80 60 80 77 59 81 78 58 82 58 82 79 57 82 80 56 83 56 83 56 83 56 83 56 83 81 55 84 82 53 84 53 84 83 52 85 84 51 86 51 86 51 86 85 50 86 86 49 87 49 87 87 48 88 88 47 88 47 88 47 88 47 88 89 46 89 90 45 89 45 89 continued on next page.
LV8729V no.a1702d-15/21 continued from preceding page. step 32w1-2 p hase 16w1-2 p hase 8w1-2 p hase 4w1-2 p hase 2w1-2 p hase w1-2 p hase ( % ) 1-2 p hase ( % ) 2 p hase ( % ) 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 91 44 90 92 43 90 43 90 43 90 93 42 91 94 41 91 41 91 95 39 92 96 38 92 38 92 38 92 38 92 38 92 38 92 97 37 93 98 36 93 36 93 99 35 94 100 34 94 34 94 34 94 101 33 95 102 31 95 31 95 103 30 95 104 29 96 29 96 29 96 29 96 105 28 96 106 27 96 27 96 107 25 97 108 24 97 24 97 24 97 109 23 97 110 22 98 22 98 111 21 98 112 20 98 20 98 20 98 20 98 20 98 113 18 98 114 17 99 17 99 115 16 99 116 15 99 15 99 15 99 117 13 99 118 12 99 12 99 119 11 99 120 10 100 10 100 10 100 10 100 121 9 100 122 7 100 7 100 123 6 100 124 5 100 5 100 5 100 125 4 100 126 2 100 2 100 127 1 100 128 0 100 0 100 0 100 0 100 0 100 0 100 0 100
LV8729V no.a1702d-16/21 (12) current wave example in each excitation m ode ( 2 phase, 1-2 phase, 4w1-2 phase, 32w1-2 phase) 2-phase excitation (cw mode) 1-2 phase excitation (cw mode) stp mo l1 (%) (%) -100 -100 100 100 0 0 i2 stp mo i1 (%) -100 -100 100 (%) 100 0 0 i2
LV8729V no.a1702d-17/21 4w1-2 phase excitation ( cw mode ) 32w1-2 phase excitation ( cw mode ) stp mo i1 -100 (%) 100 50 -50 0 i2 -100 (%) 100 50 -50 0 stp mo i1 -100 (%) 100 50 -50 0 i2 -100 (%) 100 50 -50 0
LV8729V no.a1702d-18/21 (13) current control operation ( sine-wave increasing direction ) ( sine-wave decreasing direction ) each of current modes operates with the follow sequence. ? the ic enters charge mode at a rising edge of the ch opping oscillation. ( a period of charge mode (blanking time) is forcibly present in approximately 1 s, regardless of the current value of the coil current (icoil) and set current (iref)). ? in a period of blanking time, the coil current (icoil) and the setting curre nt (iref) are compared. if an icoil < iref state exists during the charge period: the ic operates in charge mode until icoil iref. after that, it switches to slow decay mode and then switches to fast decay mode in the last approximately 1 s of the period. if no icoil < iref state exists during the charge period: the ic switches to fast decay mode and the coil cu rrent is attenuated with the fast decay operation until the end of a chopping period. the above operation is repeated. normally, in the sine wa ve increasing direction the ic operates in slow (+ fast) decay mode, and in the sine wave decresing direction th e ic operates in fast decay mode until the current is attenuated and reaches the set value and the ic operates in slow (+ fast) decay mode. fast slow charge fast slow charge fchop stp fast slow fast slow charge fchop stp charge blanking time blanking time blanking time setting current setting current setting current setting current coil current current mode current mode coil current
LV8729V no.a1702d-19/21 (14) output short-circuit protection circuit built-in output short-circuit protection circuit makes output to enter in stand-by mode. this function prevents the ic from damaging when the output shorts circuit by a voltage short or a ground short, etc. when output short state is detected, short-circuit detection circuit state the operating and output is once turned off. subsequently, the output is turned on again after the timer latch period ( typ. 256 s ). if the output remains in the short-circuit state, turn off the output, fix the output to the wait mode, and turn on the emo output. when output is fixed in stand-by mode by output short protection circuit, output is released the latch by setting st = ?l?. (15) open-drain pin for switching holding current the output pin is an open-drain connection. this pin is turned on when no rising edge of stp betw een the input signals while a pe riod determined by a capacitor between osc2 and gnd, and outputs at low levels. the open-drain output in once turned on, is turned off at the next rising edge of stp. holding current switching time ( tdown ) is set as shown below by a capacitor between osc2 pin and gnd. tdown = cosc2 0.4 10 9 (s) (example) when cosc2 = 1500pf, the holding current switching time is shown below. tdown = 1500pf 0.4 109 = 0.6 (s) (16) thermal shutdown function the thermal shutdown circuit is incor porated and the output is turned of f when junction temperature tj exceeds 180c and the abnormal state warning output is turned on. as the temperature falls by hysteresis, the output turned on again (automatic restoration). the thermal shutdown circuit does not guarantee the protection of the final product because it operates when the temperature exceed the junction temperature of tjmax=150c. tsd = 180c (typ) ? tsd = 40c (typ)
LV8729V no.a1702d-20/21 application circuit example the above sample application circuit is set to the following conditions: ? output enable function fixed to the output state ( oe = ?h? ) ? reset function fixed to the output state ( rst = ?h? ) ? chopping frequency : 55.5khz ( cosc1 = 180pf ) the set current value is as follows : i out = ( current setting reference voltage / 5 ) / 0.22 vm nc nc vreg1 st md1 md2 md3 oe rst nc fr stp osc1 osc2 emo down mo vref sgnd nc vreg2 out1a out1a nc nc vm1 vm1 rf1 rf1 out1b out1b out2a out2a rf2 rf2 vm2 nc nc pgnd2 out2b out2b vm2 pgnd1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 LV8729V 180pf m + - + - motor power supply logic input short-circuit state detection monitor current setting reference voltage
LV8729V ps no.a1702-21/21 ordering information device package shipping (qty / packing) LV8729V-tlm-h ssop44k (275mil) (pb-free / halogen free) 2000 / tape & reel LV8729V-mpb-h ssop44k (275mil) (pb-free / halogen free) 30 / fan-fold on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liab ility arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use a s components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other applica tion in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for an y such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and dis tributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona linjuryor death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale i n any manner.

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